Configuring timing parameters to ensure execution-time opacity in timed automata

by André, Étienne, Lefaucheux, Engel, Lime, Didier, Marinho, Dylan, SUN, Jun
Published 2023

Refinement-based Specification and Analysis of Multi-core ARINC 653 Using Event-B

by ZHANG, Feng, ZHANG, Leping, ZHAO, Yongwang, LIU, Yang, SUN, Jun
Published 2023

Silent compiler bug de-duplication via three-dimensional analysis

by YANG, Chen, CHEN, Junjie, FAN, Xingyu, JIANG, Jiajun, SUN, Jun
Published 2023

A Quantum interpretation of separating conjunction for local reasoning of Quantum programs based on separation logic

by LE, Xuan Bach, LIN, Shang-Wei, SUN, Jun, SANAN, David
Published 2022

A formal specification and verification framework for timed security protocols

by Li, Li, Sun, Jun, Liu, Yang, Sun, Meng, Dong, Jin-Song
Published 2020

Model checking software architecture design

by Zhang, Jiexin, Liu, Yang, Sun, Jing, Dong, Jin Song, Sun, Jun
Published 2013

Using monterey phoenix to formalize and verify system architectures

by Zhang, Jiexin, Liu, Yang, Auguston, Mikhail, Sun, Jun, Dong, Jin Song
Published 2013

NHC-catalyzed cascade reaction between β-methyl enals and dienones for quick construction of complex multicyclic lactones

by Sun, Jun, Xu, Jun, Nie, Guihua, Jin, Zhichao, Chi, Robin Yonggui
Published 2021

Active fuzzing for testing and securing cyber-physical systems

by CHEN, Yuqi, XUAN, Bohan, POSKITT, Christopher M., SUN, Jun, ZHANG, Fan
Published 2020

Model checking software architecture design

by ZHANG, Jiexin, LIU, Yang, SUN, Jing, DONG, Jin Song, SUN, Jun
Published 2012

Translating PDDL into CSP# - The PAT approach

by LI, Yi, SUN, Jing, DONG, Jin Song, LIU, Yang, SUN, Jun
Published 2012

PRTS: An approach for model checking probabilistic real-time hierarchical systems

by SUN, Jun, LIU, Yang, SONG, Songzheng, DONG, Jin Song, LI, Xiaohong
Published 2011

Towards a model checker for NesC and wireless sensor networks

by ZHENG, Manchun, SUN, Jun, LIU, Yang, DONG, Jin Song, GU, Yu
Published 2011

Fair model checking with process counter abstraction

by SUN, Jun, LIU, Yang, ROYCHOUDHURY, Abhik, LIU, Shanshan, DONG, Jin Song
Published 2009

Timed automata patterns

by DONG, Jin Song, HAO, Ping, QIN, Shengchao, SUN, Jun, YI, Wang
Published 2008

Specifying and verifying sensor networks: An experiment of formal methods

by DONG, Jin Song, SUN, Jing, SUN, Jun, TAGUCHI, Kenji, ZHANG, Xian
Published 2008

Improved reachability analysis in DTMC via divide and conquer

by SONG, Songzheng, GUI, Lin, SUN, Jun, LIU, Yang, DONG, Jin Song
Published 2013

Formal modeling and validation of Stateflow diagrams

by CHEN, Chunqing, SUN, Jun, LIU, Yang, DONG, Jin Song, ZHENG, Manchun
Published 2012

Using monterey phoenix to formalize and verify system architectures

by ZHANG, Jiexin, LIU, Yang, AUGUSTON, Mikhail, SUN, Jun, DONG, Jin Song
Published 2012

TLV: Abstraction through testing, learning, and validation

by SUN, Jun, XIAO, Hao, LIU, Yang, LIN, Shang-Wei, QIN, Shengchao
Published 2015