Statistical noise margin estimation for sub-threshold combinational circuits

by Pu, Y., De Gyvez, J.P., Corporaal, H., Ha, Y.
Published 2014

An ultra-low-energy/frame multi-standard JPEG co-processor in 65nm CMOS with sub/near-threshold power supply

by Pu, Y., De Gyvez, J.P., Corporaal, H., Ha, Y.
Published 2014

V t balancing and device sizing towards high yield of sub-threshold static logic gates

by Pu, Y., De Gyvez, J.P., Corporaal, H., Ha, Y.
Published 2014

An ultra-low-energy multi-standard JPEG Co-processor in 65 nm CMOS with sub/near threshold upply voltage

by Pu, Y., De Gyvez, J.P., Corporaal, H., Ha, Y.
Published 2014