PERANCANGAN PENGALI INTEGERMULTI-PRESISI UNTUK SISTEM KRIPTO RSA DENGAN METODA MULTIPLICATION - Adnan
Abstract: In this thesis, we make a hardware design for multi-precision integers multiplier of 512 bits x 512 bits to perform Montgomery multiplication that repeatedly performed in modular exponentiation, where this modular exponentiation constitutes main operation in RSA cryptosystem. To improve performance of integer multiplication , we exploit parallelism of standard multiplication algorithm. This lead us to the pipeline architecture comprises eight processing elements that operate at word level to produce partial-product in (carry, sum) form. This design shall accelerate computation of modular exponentiation with modulus p 512 bits and with Chinese remainder theorem; we will be able to get 1024-bit cryptosystem as fast as 512-bit system. Testing both of methods to perform RSA decryption performed with computer program with test vector from RSAES-OAEP Encryption Scheme.