#TITLE_ALTERNATIVE# - Syafri Hidayat (NIM 132 03 094) , Yan
Abstract: In this final project, design of Reed-Solomon Decoder (255,239,t=8) is developed as a part of WiMax chipset module. Reed-Solomon Decoder consists of four main processing elements: syndrome generator, Euclidean algorithm, chien search, and fast Komo-Joiner algorithm. Design step begin with identifying specification, in this case is from IEEE 802.16. Next step is choosing the decoding algorithm that will be used. The chosen algorithm is the algorithm that cost less resource-both time and area. The algorithm then modeled into bit-precision model using Matlab. The performance of the model than measured, which is Bit-Error-Rate (BER), by generating random data, than the data is encoded, than given it some error, than the data decoded by RS-Decoder model that has been designed. If the performance meets the expectation from the standard then the architecture will be designed. System architecture consists of data-path, control-unit, and timing-diagram. Control-unit used as handshaking controller with other module outside RS-Decoder, as a module to initiate register and memory value, and as process masking controller for each computation.