Application of Taguchi method in designing a 22nm high-k/metal gate NMOS transistor
This paper reports on the application of Taguchi method in modelling a 22nm gate length high-k/metal gate NMOS transistor. The Nominal-the-Best Signal-to-noise Ratio (SNR) using Taguchi's optimization technique was utilized to optimize the process parameters in determining the best threshold vo...
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| Main Authors: | , , , |
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| Other Authors: | |
| Format: | Conference Paper |
| Published: |
Trans Tech Publications
2023
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| Institution: | Universiti Tenaga Nasional |
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