Application of Taguchi method in designing a 22nm high-k/metal gate NMOS transistor

• Main Authors: Afifah Maheran, A.H., Menon, P.S., Ahmad, I., Shaari, S.
• Published: 2017
• Online Access: http://dspace.uniten.edu.my:8080/jspui/handle/123456789/5209
• Institution: Universiti Tenaga Nasional

This paper reports on the application of Taguchi method in modelling a 22nm gate length high-k/metal gate NMOS transistor. The Nominal-the-Best Signal-to-noise Ratio (SNR) using Taguchi's optimization technique was utilized to optimize the process parameters in determining the best threshold vo...