Energy efficient 8-bit microprocessor for wireless sensor network applications

• Main Authors: Hoon, Yap, Kamsani, Noor Ain, Mohd Sidek, Roslina, Sulaiman, Nasri, Rokhani, Fakhrul Zaman
• Format: Conference or Workshop Item
• Language: English
• Published: IEEE 2013
• Online Access: http://psasir.upm.edu.my/id/eprint/68949/1/Energy%20efficient%208-bit%20microprocessor%20for%20wireless%20sensor%20network%20applications.pdf; http://psasir.upm.edu.my/id/eprint/68949/
• Institution: Universiti Putra Malaysia

Due to high demand of 'green' electronics for portable devices, an 8-bit microprocessor with low power features is proposed. The proposed microprocessor is designed using Silterra 130nm general (G) and low power (LP) CMOS logic processes with chip layout size of 4900 μm2. Both processors are designed to operate at supply voltage of 1.2V with clock frequency of 50MHz. A substantial reduction of the leakage power is observed between G and LP processes where the 130LP-process microprocessor showed reduction in 3 orders of magnitude in comparison to its 130G-process counterpart. Low power clock gating technique is then being applied to the design in order to obtain further power reduction and this technique has successfully reduced the dynamic power of the design by 44.6%.