Interconnect delay and routing in nanometer VLSI
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my.utm.361662020-02-04T04:04:30Z http://eprints.utm.my/id/eprint/36166/ Interconnect delay and routing in nanometer VLSI Kuay, Chong Lee TK Electrical engineering. Electronics Nuclear engineering 2008 Thesis NonPeerReviewed Kuay, Chong Lee (2008) Interconnect delay and routing in nanometer VLSI. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering. |
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TK Electrical engineering. Electronics Nuclear engineering |
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TK Electrical engineering. Electronics Nuclear engineering Kuay, Chong Lee Interconnect delay and routing in nanometer VLSI |
format |
Thesis |
author |
Kuay, Chong Lee |
author_facet |
Kuay, Chong Lee |
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Kuay, Chong Lee |
title |
Interconnect delay and routing in nanometer VLSI
|
title_short |
Interconnect delay and routing in nanometer VLSI
|
title_full |
Interconnect delay and routing in nanometer VLSI
|
title_fullStr |
Interconnect delay and routing in nanometer VLSI
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Interconnect delay and routing in nanometer VLSI
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interconnect delay and routing in nanometer vlsi |
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2008 |
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http://eprints.utm.my/id/eprint/36166/ |
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1662754237610721280 |