Interconnect delay and routing in nanometer VLSI

Saved in:
Bibliographic Details
Main Author: Kuay, Chong Lee
Format: Thesis
Published: 2008
Subjects:
Online Access:http://eprints.utm.my/id/eprint/36166/
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Universiti Teknologi Malaysia
id my.utm.36166
record_format eprints
spelling my.utm.361662020-02-04T04:04:30Z http://eprints.utm.my/id/eprint/36166/ Interconnect delay and routing in nanometer VLSI Kuay, Chong Lee TK Electrical engineering. Electronics Nuclear engineering 2008 Thesis NonPeerReviewed Kuay, Chong Lee (2008) Interconnect delay and routing in nanometer VLSI. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering.
institution Universiti Teknologi Malaysia
building UTM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Malaysia
content_source UTM Institutional Repository
url_provider http://eprints.utm.my/
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Kuay, Chong Lee
Interconnect delay and routing in nanometer VLSI
format Thesis
author Kuay, Chong Lee
author_facet Kuay, Chong Lee
author_sort Kuay, Chong Lee
title Interconnect delay and routing in nanometer VLSI
title_short Interconnect delay and routing in nanometer VLSI
title_full Interconnect delay and routing in nanometer VLSI
title_fullStr Interconnect delay and routing in nanometer VLSI
title_full_unstemmed Interconnect delay and routing in nanometer VLSI
title_sort interconnect delay and routing in nanometer vlsi
publishDate 2008
url http://eprints.utm.my/id/eprint/36166/
_version_ 1662754237610721280