An FPGA-based design and implementation of an all-digital serializer for inter module communication in SoC

• Main Authors: Assaad, Maher, Alser, Mohammed
• Format: Article
• Published: 2011
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utp.edu.my/7462/1/_pdf; http://eprints.utp.edu.my/7462/
• Institution: Universiti Teknologi Petronas

In this paper, an all-digital serializer circuit based on a novel frequency and delay locked-loop (F/DLL) clock multiplier is presented. The advantages of the proposed F/DLL are that, it simultaneously generates a high frequency signal from a low frequency reference signal and synchronizes the two s...