Pavlov, A., & Sachdev, M. (2017). CMOS SRAM circuit design and parametric test in nano-scaled technologies: Process-aware SRAM design and test. Springer.
Chicago Style CitationPavlov, Andrei, and Manoj Sachdev. CMOS SRAM Circuit Design and Parametric Test in Nano-scaled Technologies: Process-aware SRAM Design and Test. Springer, 2017.
MLA引文Pavlov, Andrei, and Manoj Sachdev. CMOS SRAM Circuit Design and Parametric Test in Nano-scaled Technologies: Process-aware SRAM Design and Test. Springer, 2017.
警告:這些引文格式不一定是100%准確.