Field programmable gate array-based acceleration of shortest-path computation

• Main Authors: Jagadeesh, George Rosario, Srikanthan, T.., Lim, C. M.
• Other Authors: School of Computer Engineering
• Format: Article
• Language: English
• Published: 2014
• Subjects: DRNTU::Engineering::Computer science and engineering
• Online Access: https://hdl.handle.net/10356/104263; http://hdl.handle.net/10220/20133
• Institution: Nanyang Technological University

There exist several practical applications that require high-speed shortest-path computations. In many situations, especially in embedded applications, an field programmable gate array (FPGA)-based accelerator for computing the shortest paths can help to achieve high performance at low cost. This st...