An area efficient 1024-point low power radix-22 FFT processor with feed-forward multiple delay commutators

Radix-2k delay feed-back and radix-K delay commutator are the most well-known pipeline architecture for FFT design. This paper proposes a novel radix-22 multiple delay commutator architecture utilizing the advantages of the radix-22 algorithm, such as simple butterflies and less memory requirement....

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Main Authors: Le Ba, Ngoc, Kim, Tony Tae-Hyoung
其他作者: School of Electrical and Electronic Engineering
格式: Article
語言:English
出版: 2019
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在線閱讀:https://hdl.handle.net/10356/105819
http://hdl.handle.net/10220/48771
http://dx.doi.org/10.1109/TCSI.2018.2831007
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機構: Nanyang Technological University
語言: English