發送短信 : Design of time-predictable architecture and DDR memory bank allocation for COTS multi-cores

  _  __   __   __   ______    _    _      _____  
 | |/ //  \ \\/ // |      \\ | || | ||   / ___// 
 | ' //    \ ` //  |  --  // | || | ||   \___ \\ 
 | . \\     | ||   |  --  \\ | \\_/ ||   /    // 
 |_|\_\\    |_||   |______//  \____//   /____//  
 `-` --`    `-`'   `------`    `---`   `-----`