Uniform delayering of copper metallization - Siah, Yu Wen (2020)
Integrated circuit chips of newer technology usually have a larger die size and an increase number of metallization. Hence, pure usage of polishing to remove the layers would induce severe edge rounding. An alternative method is proposed to decrease the polishing time for copper metallization removal while reducing edge rounding on the sample during sample preparation that will preserve the integrity of the layers for further failure analysis.