Mapping large-scale systems on to high density FPGAs - Herath, Kalindu Bandara (Nanyang Technological University, 2020)
Modern FPGAs that benefit from advancement in process technology and hard IP cores are increasingly becoming the choice for multi-million logic cell designs due to lower Non-Recurring Engineering (NRE) costs and shorter Time-to-Market (TTM) pressures. While state-of-the-art CAD tools are capable of efficiently mapping small to medium-scale designs, they suffer from prohibitively long compilation time, higher power consumption and sub-optimal compute performance for large applications. In this thesis, novel techniques have been proposed to accelerate the mapping of large applications into high-density heterogeneous FPGAs while lowering the overall power consumption without compromising compute performance.