Spin-orbit torque magnetization switching in Co/Pt multilayers for multistate memory and logic devices - Lim, Gerard Joseph (Nanyang Technological University, 2021)
Spintronics is a highly researched topic for its rich underlying physics as well as for practical applications such as in magnetic random-access memory (MRAM). It has proven to be a serious contender in emerging memory technology due to its intrinsic non-volatility, low power dissipation, and high speed. The spin degree of freedom further opens opportunities that exploit its ultrafast dynamics and spin transport. Instead of transistors and charge-based elements, spintronic devices use the magnetization state in a ferromagnetic material to store and interpret information. More recently, spintronic devices have been proposed for logical, neuromorphic, and compute-in-memory applications. Further investigation on material and device physics are crucial for developing new spintronic memory and computation elements. In this thesis, the quantification and optimization of current-induced spinorbit torques (SOT) in [Co/Pt] multilayers are investigated. The thin film multilayer exhibiting perpendicular magnetic anisotropy (PMA) is characterized using adiabatic harmonic Hall measurements for SOT efficiency optimization. Due to the complex structure, the effect of Pt seed and interlayer thickness on the magnetic properties and SOT efficiency is studied. Manipulation of magnetization for multistate memory and logic functionality is also explored. Multistate magnetization switching, useful for synaptic applications due to the analogue-like behaviour, is experimentally demonstrated in a Hall cross device. Through finite element and Mumax simulations, the analogue-like response is shown to be a result of the geometrically-induced inhomogeneous current-density profile of the Hall cross structure. The thermal impact on the multi-state device operation is also studied through multi-state switching at elevated device temperatures. A compound structure using similar switching techniques is used to develop a reconfigurable logic device, in which an integrated bias field line allows for on-chip local Oersted field generation for breaking the switching symmetry in PMA devices. The logic device is then used to construct a half-adder through the circuit simulator “Simulation Program with Integrated Circuit Emphasis” (SPICE). The results from the works presented in this thesis aims to provide a platform from which to develop more efficient SOT-driven spintronic memory and logic devices.