Optimisation of microdisk parameters to improve existing microdisk designs - Muhammad Syafiq Muhammad Farouk (Nanyang Technological University, 2021)
With the minimisation of microchips in accordance with Moore’s Law, a major limiting factor in the performance of microchips is the interconnect bottleneck. The interconnect bottleneck is caused by the physical connections between components in a microchip such as metal wiring becoming the limiting factor. To resolve this, the research on the replacement of metallic interconnects with optical interconnects has been ongoing. However, a major issue with this approach is the lack of a CMOS-compatible laser for the photonic integrated circuit. Thus, to develop a laser for the integrated circuit, Ge and GeSn lasers are being researched due to their compatibility in these circuits. High Q-factor values are typically observed in microdisks lasing cavities. Furthermore, due to the small footprint and ease of fabrication of microdisks, microdisks are crucial components in the realisation of the design for the PICs. Thus, Ge and GeSn microdisks will be the focus of the simulations in this project.