Advancing chip-level communication: a comparative analysis of conventional, smart, and ARSmart network-on-chip architectures - Peh, Elijah Kai En (Nanyang Technological University, 2024)
This Final Year Project (FYP) report presents a comprehensive analysis of Software Defined on-Chip Networking within Network-on-Chip (NoC) architectures, specifically focusing on conventional NoC, SMART NoC, and ArSMART NoC designs. It investigates these architectures through simulations to assess their performance, particularly in terms of latency and power efficiency. The research is motivated by the advancements in multi-core processor technology, necessitating improved on-chip communication networks to handle the increased complexity and demands of modern computing systems efficiently.