Low-power reference circuit design for integrated DC-DC converters

Current reference is a fundamental circuit block for analog and mixed-signal circuit design. Recent dc-dc converter designs require high-performance, low current output current references for low quiescent current operations. This project presents a low-power PVT (process, voltage, temperature) inva...

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主要作者: Tham, Yong Hao
其他作者: Chang Joseph
格式: Final Year Project
語言:English
出版: Nanyang Technological University 2024
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在線閱讀:https://hdl.handle.net/10356/176295
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機構: Nanyang Technological University
語言: English
實物特徵
總結:Current reference is a fundamental circuit block for analog and mixed-signal circuit design. Recent dc-dc converter designs require high-performance, low current output current references for low quiescent current operations. This project presents a low-power PVT (process, voltage, temperature) invariant current reference circuit design using TSMC 65nm process node. This circuit replaces conventional on-chip resistor with switched-capacitor equivalent resistor as a reference for voltage-to-current conversion. Overall, this current reference circuit utilizes a PVT invariant bandgap voltage reference circuit as a voltage generator, followed by a voltage-to-current converter utilizing a low-power operational transconductance amplifier (OTA) and switched-capacitor equivalent resistor. This circuit also allows users to choose between external resistor and on-chip switched-capacitor equivalent resistor for current generation, through digital control signals. The on-chip switched capacitor current reference is designed for a 5uA current output, with a total current consumption of 8.761uA, inclusive of reference current output. The circuit is also able to contain the fluctuations of the switching current to within 0.32% of the magnitude of generated current output. It also has a temperature coefficient of 22.02 ppm/℃ for a temperature range of -40℃ to 125℃, and a line sensitivity of 0.17%/V for a voltage range from 1.8V to 2.4V. The process sensitivity, ( / ) is expected to be lower than the Monte Carlo simulation results of 5.02% in post-fabrication measurements with the advantage of precisely fabricated capacitor and an accurate clock reference. The performance of this current reference without trimming matches the performance of circuits in literature review with similar current output range.