Study on hardware and software collaboration of AFDX communication system based on Xilinx UltraScale MPSoC - Ma, Baoqi (Nanyang Technological University, 2025)
This project is the related research of Avionics Full Duplex Switched Ethernet Network (AFDX) Aviation Communication Protocol. The hardware structure and related IP cores are designed on a PC, and data communication is conducted with the laboratory host through Zynq UltraScale+ MPSoCs EG series chip, and then data analysis is carried out to verify the performance of AFDX protocol. The research content of the subject consists of the following parts. (1) The simulation design of the board is carried out to test the data transmission function of PL Ethernet, design AXI protocol core to complete the connection of PS and PL inside the board; (2) Modify the AFDX IP core in Vitis. PS supports the ARINC664 specification, the software implements the transport layer (UDP) and network layer (IP) protocols, the hardware implements the virtual link layer and physical layer protocols, and verify virtual link, integrity check and redundancy management of the AFDX protocol; (3) In order to test the receiving function of AFDX, design data multicast communication from PC to AFDX end system host to match the IP address of AFDX protocol; (4) Configure parameters such as the virtual link, IP address, data source address, and test function of the flight analyzer, select the ARINC664 protocol, capture and preliminarily analyze the received data, then import the data to WireShark for detailed verification.