APA引文

Bai, J., & Xiaohong, T. (2025). Analog circuit layout design based on cadence virtuoso and calibre. Nanyang Technological University.

Chicago Style Citation

Bai, Jiaming, and Tang Xiaohong. Analog Circuit Layout Design Based On Cadence Virtuoso and Calibre. Nanyang Technological University, 2025.

MLA引文

Bai, Jiaming, and Tang Xiaohong. Analog Circuit Layout Design Based On Cadence Virtuoso and Calibre. Nanyang Technological University, 2025.

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