Design of an active linear resistor for fully integrated circuit applications - Liu, Yu (Nanyang Technological University, 2025)
The dissertation presents the design and implementation of a linear, stable, low-power and PVT insensitive floating active resistor, which is realized using TSMC 40 nm CMOS process technology. By incorporating the automatic tuning circuit, this work has achieved the improved performance metrics which include low process sensitivity, reduced temperature coefficient, and good linearity. Monte-Carlo (MC) simulations are conducted to evaluate the active resistor's performance under variations in temperature, process, and supply voltage. The proposed design has demonstrated an average resistance process sensitivity of 0.64%, a temperature coefficient (T.C.) of 57 ppm/°C across –25 °C to 85 °C, and a linearity figure of merit (FOM) of 2.4×10-2 V-1 with a resistance close to MΩ level. The typical power consumption of a single active resistor is 0.25 µW at 2.1 V bootstrapped supply voltage through a Dickson charge pump (DCP) circuit using a DC input of 1 V. These results have confirmed that the proposed active resistor can function as a robust and efficient resistor for low-voltage integrated circuits and systems.