Cu metallization and dielectric removal for failure analysis of ICs - Siah, Yu Wen. (2012)
Although a defect may be well understood electrically in the recent years, capturing the anomaly into image remains necessary to verify the defect location. As technology further develops, ICs nowadays have more than one interconnect layer. Hence, it is necessary to first remove the overlying layers, otherwise viewing of the embedded defects would be impossible. However, in some cases, the removal of one layer can act as an in-situ decoration of another layer, masking the defect or removing the defect. Thus, it is important that the delayering (also known as parallel lapping) method only removes the unwanted layer.