APA引文

Niu, C., & Engineering, S. o. E. a. E. (2012). Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices.

Chicago Style Citation

Niu, Chao., and School of Electrical and Electronic Engineering. Non-volatile Memory Design Platform With 3D Hybrid Integration of CMOS and Nano Devices. 2012.

MLA引文

Niu, Chao., and School of Electrical and Electronic Engineering. Non-volatile Memory Design Platform With 3D Hybrid Integration of CMOS and Nano Devices. 2012.