Circuit design and analysis for emerging nonvolatile memory technology

• 主要作者: Yang, Ziang
• 其他作者: Goh Wang Ling
• 格式: Final Year Project
• 語言: English
• 出版: 2016
• 主題: DRNTU::Engineering
• 在線閱讀: http://hdl.handle.net/10356/68115
• 機構: Nanyang Technological University

In recent years, CMOS-based conventional memory technologies including SRAM, DRAM, and Flash memories have been becoming system performance bottleneck due to the speed gap between memory and logic, consuming a large portion of power consumption in systems, and also facing technology and economic issues as CMOS scaling is approaching the fundamental limits. SRAM is the fastest memory in current memory technology, however, its major issue is the leakage power to retain the data storage. DRAM has second speed, but it needs to be refreshed constantly due to the capacitor based memory structure. Flash memory has ability of non-volatility, but it also has poor endurance and slower speed. It is necessary to investigate emerging Non-volatile memory because all well-established conventional memories have inevitable limitations. In this report, three emerging Nonvolatile Memory (NVM) technologies, including Phase-Change RAM (PCRAM), Magnetic RAM (MRAM), and Resistive RAM (ReRAM), are introduced. By a comparison of performance between these three NVMs, the MRAM is selected to become a hopeful candidate for next-generation mainstream NVM technology. Then, a 4T-2MTJ MRAM cell was designed to have zero standby power and high scalability and it is compared with a 6T-SRAM cell. A sense Amplification (SA) was designed to act as a readout circuit. At last, the performance of these two cells are analyzed and contrasted in read operation. The whole simulations in this report were carried out and ran out on cadence virtuoso platform and used 180nm CMOS technology.