FPGA implementation of Kahan summation algorithm

• المؤلف الرئيسي: Darshni, R
• مؤلفون آخرون: Smitha Kavallur Pisharath Gopi
• التنسيق: Final Year Project
• اللغة: English
• منشور في: 2018
• الموضوعات: DRNTU::Engineering::Computer science and engineering
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/76134

In this project, Kahan Summation Algorithm, and an improved version of it, Kahan- Babuska Algorithm have been implemented in an FPGA platform to increase the accuracy in basic floating-point computation The Kahan Summation Algorithm is a method to add floating point numbers in a way to reduce the...