Kapre, N., DeHon, A., & Engineering, S. o. C. (2015). SPICE2: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA.
Chicago Style CitationKapre, Nachiket, André DeHon, and School of Computer Engineering. SPICE2: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA. 2015.
MLA引文Kapre, Nachiket, André DeHon, and School of Computer Engineering. SPICE2: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA. 2015.
警告:這些引文格式不一定是100%准確.