Concurrent error detection in bit-serial normal basis multiplication over GF(2^m) using multiple parity prediction schemes - Lee, Chiou Yng (2011)
New bit-serial architectures with concurrent error detection capability are presented to detect erroneous outputs in bit-serial normal basis multipliers over GF(2^m) using single and multiple-parity prediction schemes. It is shown that different types of normal basis multipliers could be realized by similar architectures. The proposed architectures can detect errors with nearly 100% probability.