Optimizing 35nm NMOS devices V TH and I LEAK by controlling active area and halo implantation dosage

by Elgomati H.A., Majlis B.Y., Salehuddin F., Ahmad I., Zaharim A., Hamid F.A.
Published 2023

Modelling of process parameters for 32nm PMOS transistor using Taguchi method

by Elgomati H.A., Majlis B.Y., Hamid A.M.A., Susthitha P.M., Ahmad I.
Published 2023

Characterization of fabrication process noises for 32nm NMOS devices

by Elgomati H.A., Majlis B.Y., Ahmad I., Ziad T.
Published 2023

Cobalt silicide and titanium silicide effects on nano devices

by Elgomati H.A., Majlis B.Y., Salehuddin F., Ahmad I., Zaharim A., Hamid F.A.
Published 2023

Statistical optimization for process parameters to reduce variability of 32 nm PMOS transistor threshold voltage

by Elgomati H.A., Majlis B.Y., Ahmad I., Salehuddin F., Hamid F.A., Zaharim A., Mohamad T.Z., Apte P.R.
Published 2023

Modeling and optimizing of threshold voltage of 32nm NMOS transistor using L18 orthogonal array Taguchi method

by Elgomati H.A., Majlis B.Y., Ahmad I.
Published 2023

Application of Taguchi method in the optimization of process variation for 32nm CMOS technology

by Elgomati H.A., Majlis B.Y., Ahmad I., Salehuddin F., Hamid F.A., Zaharim A., Apte P.R.
Published 2023