Characterization of fabrication process noises for 32nm NMOS devices

• Main Authors: Elgomati H.A., Majlis B.Y., Ahmad I., Ziad T.
• Other Authors: 36536722700
• Format: Conference Paper
• Published: 2023
• Subjects: Fabrication; MOS devices; Semiconductor growth; Silicides; Taguchi methods; Threshold voltage; Annealing temperatures; Degree of noise; Diffusion temperature; Fabrication process; Nanometer device; NMOS devices; NMOS transistors; Optimum fabrication; Sacrificial oxide; Transistors
• Institution: Universiti Tenaga Nasional

This paper describes the effect of fabrication process noises to Sub-nanometer devices, which in this case a 32nm NMOS transistor. This experiment a part of a full Taguchi Method analysis to obtain an optimum fabrication recipe for the said transistor. The two noises introduced in the fabrication is...