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Chandrasekaran, R.
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Chandrasekaran, R.
Showing
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Chandrasekaran, R.
'
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1
A 1 GHz decimation filter for Sigma-Delta ADC
by
Lian, Y.
,
Wei, Y.
,
Chandrasekaran
,
R
.
Published 2014
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2
A high-speed low-power D flip-flop
by
Chandrasekaran
,
R
.
,
Yong, L.
,
Rana, R.S.
Published 2014
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3
A 3-5 GHz all-digital CMOS UWB pulse generator
by
Wang, L.
,
Chandrasekaran
,
R
.
,
Lian, Y.
Published 2014
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4
Auction-based vs. incentive-based Multiple-Cloud orchestration mechanisms
by
Iyer, G.N.
,
Chandrasekaran
,
R
.
,
Veeravalli, B.
Published 2014
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