A −78dBm sensitivity super-regenerative receiver at 96 GHz with quench-controlled metamaterial oscillator in 65nm CMOS

by Shang, Yang, Fu, Haipeng, Yu, Hao, Ren, Junyan
Published 2013

Stable backward reachability correction for PLL verification with consideration of environmental noise induced jitter

by Song, Yang, Fu, Haipeng, Yu, Hao, Shi, Guoyong
Published 2013

Design and analysis of wide frequency-tuning-range CMOS 60 GHz VCO by switching inductor loaded transformer

by Fei, Wei, Yu, Hao, Fu, Haipeng, Ren, Junyan, Yeo, Kiat Seng
Published 2014

A 5-Bit 1.25GS/S 4.7mW delay-based pipelined ADC in 65nm CMOS

by Mesgarani, A., Tekin, A., Ay, S. U., Fu, Haipeng, Yan, Mei, Yu, Hao
Published 2013

A dividerless PLL with low power and low reference spur by aperture-phase detector and phase-to-analog converter

by Cai, Deyun, Fu, Haipeng, Ren, Junyan, Li, Wei, Li, Ning, Yu, Hao, Yeo, Kiat Seng
Published 2012