Stable backward reachability correction for PLL verification with consideration of environmental noise induced jitter
It is unknown to perform efficient PLL system-level verification with consideration of jitter induced by substrate or power-supply noise. With the consideration of nonlinear phase noise macromodel, this paper introduces a forward reachability analysis with stable backward correction for PLL syst...
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Main Authors: | , , , |
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格式: | Conference or Workshop Item |
語言: | English |
出版: |
2013
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在線閱讀: | https://hdl.handle.net/10356/101068 http://hdl.handle.net/10220/18282 |
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