Design and FPGA Implementation of PLL-based Quarter-rate Clock and Data Recovery Circuit

by Maher Assaad, Fawnizu Azmadi bin Hussin
Published 2012

Design and FPGA implementation of PLL-based quarter-rate clock and data recovery circuit

by Maher Assaad , Fawnizu Azmadi bin Hussin
Published 2012

A wide-range programmable frequency synthesizer based on a finite state machine filter

by Mohammed, Alser, Maher, Assaad, Fawnizu, Hussin
Published 2013

A CMOS Interface Circuit Design for a 32-level Resolution Light Sensor

by Israel , Yohannes, Maher, Assaad, Nor Hisham , Hamid
Published 2013

A Miniaturized Metamaterial-Based Dual-Band 4×4 Butler Matrix With Enhanced Frequency Ratio for Sub-6 GHz 5G Applications

by ABDULKADIR BELLO SHALLAH, ABDULKADIR BELLO SHALLAH, FARID ZUBIR, FARID ZUBIR, MOHAMAD KAMAL A. RAHIM, MOHAMAD KAMAL A. RAHIM, NOORLINDAWATY MD. JIZAT, NOORLINDAWATY MD. JIZAT, ABDUL BASIT, ABDUL BASIT, MAHER ASSAAD, MAHER ASSAAD, HUDA A. MAJID, HUDA A. MAJID
Published 2024