A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks

by Narasimman, Govind, Roy, Subhrajit, Fong, Xuanyao, Roy, Kaushik, Chang, Chip-Hong, Basu, Arindam
Published 2016

A Low-voltage, Low power STDP Synapse implementation using Domain-Wall Magnets for Spiking Neural Networks

by Narasimman, Govind, Roy, Subhrajit, Fong, Xuanyao, Roy, Kaushik, Chang, Chip-Hong, Basu, Arindam
Published 2019

A 126 μW readout circuit in 65nm CMOS with successive approximation based thresholding for domain wall magnet based random number generator

by Narasimman, Govind, Basu, Joydeep, Sethi, Pankaj, Krishnia, Sachin, Yi, Chen, Lew, Wen Siang, Basu, Arindam
Published 2020