A highly secured small-area low power crypto accelerator design

by Ng, Jun Sheng
Published 2019

Secured asynchronous-logic cryptography circuits to countermeasure against side-channel attack

by Ng, Jun Sheng
Published 2024

A highly efficient power model for Correlation Power Analysis (CPA) of pipelined Advanced Encryption Standard (AES)

by Ng, Jun-Sheng, Chen, Juncheng, Kyaw, Nay Aung, Lwin, Ne Kyaw Zwa, Ho, Weng-Geng, Chong, Kwen-Siong, Gwee, Bah-Hwee
Published 2021

Dual-hiding side-channel-attack resistant FPGA-based asynchronous-logic AES : design, countermeasures and evaluation

by Chong, Kwen-Siong, Ng, Jun-Sheng, Chen, Juncheng, Lwin, Ne Kyaw Zwa, Kyaw, Nay Aung, Ho, Weng-Geng, Chang, Joseph, Gwee, Bah-Hwee
Published 2021

Normalized Differential Power Analysis - for ghost peaks mitigation

by Chen, Juncheng, Ng, Jun-Sheng, Kyaw, Nay Aung, Lwin, Ne Kyaw Zwa, Ho, Weng-Geng, Chong, Kwen-Siong, Lin, Zhiping, Chang, Joseph Sylvester, Gwee, Bah-Hwee
Published 2021