NoC Wrapper Optimization under Channel Bandwidth and Test Time Constraints

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Fujiwara, Hideo
Published 2007

Core-Based Testing of System-on-Chips Utilizing the Network-on-Chip Resources

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Fujiwara, Hideo
Published 2008

Area Overhead and Test Time Co-Optimization through NoC Bandwidth Sharing

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Fujiwara, Hideo
Published 2007

Optimization of NoC Wrapper Design Under Bandwidth and Test Time Constraints

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Fujiwara, Hideo
Published 2007

NoC-Compatible Wrapper Design and Optimization under Channel-Bandwidth and Test-Time Constraints

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Fujiwara, Hideo
Published 2008

On NoC Bandwidth Sharing for the Optimization of Area Cost and Test Application Time

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Fujiwara, Hideo
Published 2008

A nonscan design-for-testability method for register-transfer-level circuits to guarantee linear-depth time expansion models

by Fujiwara, Hideo, Iwata, Hiroyuki, Yoneda, Tomokazu, Ooi, Chia Yee
Published 2008

Power-Conscious Microprocessor-Based Testing of System-on-Chip

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Orailoglu, Alex, Fujiwara, Hideo
Published 2006

Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Orailoglu, Alex, Fujiwara, Hideo
Published 2007

Power-Constrained SOC Test Schedules through Utilization of Functional Buses

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Orailoglu, Alex, Fujiwara, Hideo
Published 2006

Scheduling Power-Constrained Tests through the SoC Functional Bus

by Hussin, Fawnizu Azmadi, Yoneda, Tomokazu, Orailoglu, Alex, Fujiwara, Hideo
Published 2008

RedSOCs‐3D: Thermal‐safe Test Scheduling for 3D‐Stacked SoC

by Hussin, Fawnizu Azmadi, Yu, Thomas Edison Chua, Yoneda, Tomokazu, Fujiwara, Hideo
Published 2010