#TITLE_ALTERNATIVE#

• 主要作者: BASKORO (NIM 13204005), FARID
• 格式: Final Project
• 語言: Indonesia
• 在線閱讀: https://digilib.itb.ac.id/gdl/view/10409

In this final project, a frequency synthesizer for WiMAX subscriber-station is presented. Based on a phase-locked loop, the synthesizer can provide various channel selection to cover 1,75 MHz channel bandwidth or its multiply. A programmable divider is proposed using traditional fractional-n or usually called pulse-swallow divider scheme.<p> <br /> <br /> <br /> <br /> <br /> Phase noise of a PLL synthesizer is a major one-chip solution design consideration. A phase noise requirement is firstly derived from spectral emission specification on the IEEE 802.16-2004 standard. Then the frequency synthesizer's components are designed to fulfill those requirements. The derived phase noise requirement was on five point references.<p> <br /> <br /> <br /> <br /> <br /> The frequency synthesizer consists of PFD, Charge-pump, Loop filter, VCO, and Divider circuit. The VCO is using negative-Gm oscillator topology. This oscillator does not need any extra circuitry to maintain its amplitude. The capacitance which is usually connected in parallel with the inductance to form the LC-tank is divided into 2 similar varactor. The control voltage to the varactor was single ended due to simplicity design on the charge-pump and loop filter.<p> <br /> <br /> <br /> <br /> <br /> The frequency synthesizer was simulated using RF transistor available in AMS 0.35 um technology kit. The VCO control voltage can be tuned between 1,2-5 Volt. The VCO output frequency at 3.5 volt control voltage is 2.338 GHz. The VCO output is a differential signal with voltage swing 1,4 Volt. The simulation results in phase noise performance at five offset frequency reference show that all point are fulfill requirements derived before.