#TITLE_ALTERNATIVE#

• Main Author: ARINDRA ADIYOSO SETIO (NIM : 13206024); Pembimbing: Achmad Fuad Masud, Ir., M.Eng, ARNAUD
• Format: Final Project
• Language: Indonesia
• Online Access: https://digilib.itb.ac.id/gdl/view/15029
• Institution: Institut Teknologi Bandung

In this final project, processor Mini ARM DSP-enhanced is designed. The design was done by developing Tiny ARM32 processor to has higher digital signal processing capability. Design is described functionally and structurally using VHDL (Very High Speed Integrated Circuit <br /> <br /> <br /> Hardware Description Language) so it can be integrated and sythesized using Quartus II Web Edition software. Mini ARM DSP-enhanced processor is a RISC 32 bit processor which can be used in applications of mobile communication systems. Design was done by implementing a number of ARMv6 <br /> <br /> <br /> instructions sets and DSP-enhanced instructions. To improve the performance, 5 stages pipeline organization is used in processor so that maximum clock frequency of processor can <br /> <br /> <br /> be increased. The design of the processor is devided into two main parts: datapath and control unit. Processor is also equipped with register and hazard unit which is used to implement 5 stages pipeline organization. In order to be able to work properly, processor is connected with the <br /> <br /> <br /> instruction memory and data memory to performs data storages. The analysis process was done by using device target EP2S15F484C3, Stratix II. Based on the result of systesis and timing analyzer, it is known that the design of the processor using 4754 ALUT and 974 register, and can be operated at a maximum frequency of 42,61 MHz. To ensure <br /> <br /> <br /> the functionality of the design, simulation was done using the test vectors on the waveforms. Simulation results shows that the processor can be used to implement DSP algorithms with the expected functionality and frequencies.