THE MFIBVP REAL-TIME ARITHMETIC UNIT

• Main Author: KERLOOZA (NIM : 33205003); Tim Pembimbing : Prof. Dr. Ir. Kuspriyanto; Ir. Sarwono Sutikno, , YUSRILA
• Format: Dissertations
• Language: Indonesia
• Online Access: https://digilib.itb.ac.id/gdl/view/17702
• Institution: Institut Teknologi Bandung

The limitation of time in the real-time system demands a computation system that can adapt fast enough to the environmental changes occurred. From the literature, a common approach to this condition is done on the operating system level in the form of various task scheduling techniques. By this approach, the computation granularity is the task which is constructed by many instruction lines. If any fast environmental changes be occurred, the system’s state can come to overload. This condition can degrade the system’s performance, or worse can lead to system failure. Another common approach is established on the processor level through execution speedup. The architecture of the arithmetic unit as the computation system’s nuclei used in this solution is still using computation of fix precision technique. The computation granularity of this approach is the arithmetic instruction, better than previous approach but still have limitations. If execution time available for any arithmetic instruction is shorter than it’s ideal time, then this particular instruction will not be executed. This condition can lead to system failure. <br /> <br /> This dissertation improves the performance of the real-time computation system by making the process granulation smaller down to the arithmetic sub-instruction level. Any arithmetic instruction can be executed even when the time available is shorter that its normal. There are two basic requirements for the real-time computation system, the predictability of its output’s accuracy and its execution time. Those requirements are tried to fulfill by providing the arithmetic unit to produce the intermediate-result with such accuracy that is both predictable and already had high gain even in the early time of its process of instruction execution. The accuracy of the intermediate-result is altered in an incremental way, proportional with the availability of the arithmetic instruction’s execution time. In order to enhance the real-time system’s performance elementarily, this dissertation propose an architectural design of the basic arithmetic unit (i.e. the adder/subtractor, multiplier and divider) which combines MSB-First, interval arithmetic and variable precision computation techniques into a method namely the MSB-First Interval-Bounded Variable-Precision (MFIBVP). The MSB-First (Most Significant Bit-First) technique is a computation technique that starts its process from the MSB of its operand, different with the common computation process which starts from the least significant bit first as human perform calculation manually. By using the MSB-First, the result of an arithmetic instruction has high accuracy even from the beginning of its execution process. The interval arithmetic technique produces two results that act as lower and upper bound of the true value. With this technique, the accuracy of intermediate-result can be predicted by the difference between those two values. The smaller the difference, the higher the accuracy of the computation. By focusing on the importance of these bounds in this research, the interval-bounded computation technique is produced. Computation carried out on non fix precision can be developed by the variable precision technique. In this research, the variable precision technique is aimed for giving the arithmetic unit the ability to produce result based on computation of only parts of its operands precision. Based on the performance measured in this research, the MFIBVP arithmetic unit is proven to be able to give better performance than the arithmetic unit with well known methods of computation can give. This is caused by the ability to produce the intermediate-result along the execution time, the better accuracy produced even in the early time of execution process, and the predictability of computation result’s accuracy. The main contribution of this dissertation is the development of an arithmetic unit architecture for basic operation that can induced real-time property to the arithmetic instruction.