SYSTEM-ON-CHIP ARCHITECTURE FOR DCO-OFDM BASED VISIBLE LIGHT COMMUNICATION

• Main Author: PRATAMA PUTRA (NIM: 23215033), ANGGA
• Format: Theses
• Language: Indonesia
• Online Access: https://digilib.itb.ac.id/gdl/view/25582
• Institution: Institut Teknologi Bandung

<p align="justify"> With the increasing utilization of wireless data communication, the uses of limited RF spectrum becomes increasingly densed. To meet the increasing demands with that limitation, other wave spectrum utilization as transmission medium can be done, one of that usable spectrum is visible light spectrum. In this thesis, system-on-chip architecture design of the transmitter and receiver for visible light communication is created by utilized several DSP (Digital Signal Processing) block, those are FFT, convolutional encoder, Viterbi decoder, QPSK modulator-demodulator, interleaver-deinterleaver and synchronizer which is the critical processing block in multi-carrier modulation of DCO-OFDM. These block is implemented in FPGA module to obtain fast data processing which then combined with ARM microprocessor for process scheduling, on-chip memory as temporary data storage, ADC-DAC module as intermediary with the signal in analog domain, and ethernet module as communication port between system-on-chip module and PC. <br /> <br /> The mathematical model of the designed system has been verified and then its performances has been compared with the implementation of that model in RTL design. The testing of the system also done by doing profiling of the RTL implementation model on the hardware with the implemented software model on ARM microprocessor as the basis in determining the task partition between hardware and software in the system. The system performances is measured by transferring data point-to-point between PC with data processing latency around 2.9 miliseconds for 100 MHz clock speed. <p align="justify"> <br />