PERANCANGAN MIKROKONTROLER KOMPATIBEL INTEL 8031 PADA CPLD (COMPLEX PROGRAMMABLE LOGIC DEVICE) (BUKU I)
<b>Abstract:<p align=\"justify\"> <br /> In order to develop System on a chip design, we build an Intel 8031 binary instruction compatible microcontroller. This research describes the design of Intel 8031 compatible microcontroller called ITB8031.<p align=\"jus...
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| Format: | Theses |
| Language: | Indonesia |
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| Online Access: | https://digilib.itb.ac.id/gdl/view/5122 |
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| Institution: | Institut Teknologi Bandung |
| Language: | Indonesia |
| Summary: | <b>Abstract:<p align=\"justify\"> <br />
In order to develop System on a chip design, we build an Intel 8031 binary instruction compatible microcontroller. This research describes the design of Intel 8031 compatible microcontroller called ITB8031.<p align=\"justify\"> <br />
ITB8031 is designed with a high level language in hardware field VHDL. The output of this research is a microcontroller IPcore to be used in System on a chip design.<p align=\"justify\"> <br />
Top down design approach is used in this research. The design processes partition the microcontroller into modules, design and simulate the modules, and then integrate the modules to build ITB8031.<p align=\"justify\"> <br />
ITB8031 has been designed with Altera Max+Plus <br />
II. The simulation and verification has been done for most instructions which represents the rest. The simulation is executed per instruction with Altera Max+Plus II while verification is executed for group of instruction with Intel 8031 commercial emulator AVSIM51.<p align=\"justify\"> <br />
ITB8031 has been mapped on the Altera EPF10K100GC503-3 device. Based on this result, ITB8031 works properly at 3.10 MHz and needs 19712 bits memory and 2398 Logic Cell Block.<p align=\"justify\"> |
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