LMPLEMENTASI REAL TIME SPEECH CODER G.723.1 PADA DSK TMS320C5402
<b>Abstract :</b> <p align=\"justify\"> This thesis comprises of a study of a speech coding standard G.723.1 and its implementation on a DSP processor TMS320C5402. The G.723.1 is an ITU-T standard for speech compression which is used for low bit rate multimedia communicat...
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Format: | Theses |
Language: | Indonesia |
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Online Access: | https://digilib.itb.ac.id/gdl/view/5261 |
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Institution: | Institut Teknologi Bandung |
Language: | Indonesia |
Summary: | <b>Abstract :</b> <p align=\"justify\"> This thesis comprises of a study of a speech coding standard G.723.1 and its implementation on a DSP processor TMS320C5402. The G.723.1 is an ITU-T standard for speech compression which is used for low bit rate multimedia communications. It has two bit rates, 5.3 kbps and 6.3 kbps, and can be used on per frame basis. The low rate uses Algebraic Code Excited Linear Prediction (ACELP) and the high rate uses Multi Pulse Maximum Likelihood Quantization (MP-MLQ). The high rate results in better quality while the low rate results in good quality with lower bit rate. <br />
<p align=\"justify\"> The G.723.1 uses linear prediction analysis-by-synthesis coding. An excitation signal passes through a long-term synthesis filter and short-term synthesis filter to produce a synthesis signal. An error between synthesized signal and the original signal is weighted perceptually. The optimal excitation which minimizes mean-squarederror is choosen. An adaptive codebook is used to build a long-term synthesis filter. Fixed codebook search is used to code the residual signal. <br />
<p align=\"justify\"> The implementation objective is to achieve the real-time specification. The encoding and decoding processes have to be done in less than 30 ms. A reference program from ITU-T can not be implemented in real time, thus an optimization must take place to achieve the real-time specification. The optimization process uses the reference code as the template. By exploiting the architecture of TMS320C5402 DSP processor we can get an efficient code. <br />
<p align=\"justify\"> This research succeed in implementing G.723.1 speech coder in real time. The MIPS (Million Instructions Per Second) requirement for encoding and decoding process is 65 MIPS. The G.723.1 runs on two DSK, and both DSK can communicate each other with full duplex in real-time through an RS232 interface. |
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