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This Thesis describes the design and implementation of FIR (Finite Impulse Response) filter that has 32 multiplier coefficient or taps, with 16-bit input data and 16-bit filter coefficient. FIR filter that has linear phase is very suitable for DSP (Digital Signal Processing) system applications.<...
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| Format: | Theses |
| Language: | Indonesia |
| Online Access: | https://digilib.itb.ac.id/gdl/view/7129 |
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| Institution: | Institut Teknologi Bandung |
| Language: | Indonesia |
| Summary: | This Thesis describes the design and implementation of FIR (Finite Impulse Response) filter that has 32 multiplier coefficient or taps, with 16-bit input data and 16-bit filter coefficient. FIR filter that has linear phase is very suitable for DSP (Digital Signal Processing) system applications.<p>By adjusting the multiplier coefficient values that are derived from Kaiser window function, this filter can be functioned as a LPF (Low Pass Filter), HPF (High Pass Filter), BPF (Band Pass Filter) or BSF (Band Stop Filter). The Kaiser window function is used because the transfer function of the filter can be obtained easily, although the function has narrow transition band. It also has a very good attenuation and can control sidelobe level with respect to mainlobe peak.<p>The design uses Turbo C and Assembly language to program DSP module type of TMS320C54x (fixed point). The filter was designed on fully parallel architecture in order to achieve high speed operation. Verification of the filter performance used a motion picture of 100 x 100 pixel with 16-bit color. The result of this verification shows that the processing speed of filter is 14 frame per second. The longest time for the process is at the communication between computer and DSP module. |
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