#TITLE_ALTERNATIVE#

• Main Author: Setiawan ( NIM: 23299024 ), Budi
• Format: Theses
• Language: Indonesia
• Online Access: https://digilib.itb.ac.id/gdl/view/7469
• Institution: Institut Teknologi Bandung

Abstract: <br /> <br /> <br /> <br /> <br /> <br /> This thesis implements video codec for low bit rate communication by using a DSP chip. The algorithm used for encoding and decoding is based on ITU-T Recommendation H.263 Video coding for low bit rate communication and implemented by software on TMS320C6201 DSP chip family from Texas Instruments. <br /> <br /> <br /> <br /> <br /> Video coding requires a lot of computation time especially in the inter frame prediction where block matching process has to be done for every macroblock in a frame to be encoded. As DSP chip has a limited computing power, efficient software implementation is required to minimize video processing time and to achieve target frame rate. <br /> <br /> <br /> <br /> <br /> The video codec software implemented on this TMS320C6201 is based on software developed by Telenor R&D for desktop computer. To be executed on this DSP that has a limited internal memory, the original software has to be adapted to the new environment such as Operating System, I/O ports and other peripherals. <br /> <br /> <br /> <br /> <br /> To achieve efficient software on this DSP, some useful function provided by existing library may be used and some efficient programming guided lines should be followed. By using parallel processing capability of DSP and putting application programs on appropriate memory locations, an efficient video processing can be reached maximally. <br /> <br /> <br /> <br /> <br /> From the result of system measurement, it can be concluded that the implementation of H.263 video codec on TMS320C6201 DSP chip works properly but the system performance still can be increased more by using better algorithm/mechanism to process the video. <br />