Verification of RISC-V design with Universal Verification Methodology (UVM)

• Main Author: Liew, You Hong
• Format: Final Year Project / Dissertation / Thesis
• Published: 2022
• Subjects: T Technology (General); TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utar.edu.my/4903/1/fyp_EE_LYH_2022.pdf; http://eprints.utar.edu.my/4903/
• Institution: Universiti Tunku Abdul Rahman

Throughout the design life cycle of a processor, verification plays a crucial part in affirming the functionalities of the features implemented based on the computer architecture used. Functional verification increases the level of confidence in conformance of the processor design to its specificati...