Design Common Mode Logic (CML) Frequency Divider In CMOS Process Technology
The objective of this project is to design current mode logic (CML) frequency divider in CMOS technology. The current spikes that occur during transition between tacking and latch mode in transistor will degrade the performance of the frequency divider. The parasitic capacitances that exist in two t...
Saved in:
Main Author: | |
---|---|
Format: | Final Year Project |
Published: |
Universiti Teknologi Petronas
2009
|
Subjects: | |
Online Access: | http://utpedia.utp.edu.my/1576/ |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Universiti Teknologi Petronas |