Efficient dual mode arbitration scheme for multiprocessor hardware interface in System-on-Chip

Efficient dual mode arbitration scheme for multiprocessor hardware interface in System-on-Chip

Saved in:
Bibliographic Details
Main Authors: Motakabber, S. M. A., Rokon, M. I. R., Alam, A. H. M. Zahirul, Matin, M. A, Mahmud, Md
Format: Article
Language:English
English
Published: Institute of Advanced Engineering and Science 2023
Subjects:
TK Electrical engineering. Electronics Nuclear engineering
TK452 Electric apparatus and materials. Electric circuits. Electric networks
Online Access:http://irep.iium.edu.my/110063/13/110063_Efficient%20Dual%20Mode%20Arbitration%20Scheme%20for%20Multiprocessor%20Hardware.pdf
http://irep.iium.edu.my/110063/7/110063_Efficient%20Dual%20Mode%20Arbitration%20Scheme%20for%20Multiprocessor%20Hardware%20Interface%20in%20System-on-Chip_Scopus.pdf
http://irep.iium.edu.my/110063/
http://section.iaesonline.com/index.php/IJEEI/article/view/5032
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Universiti Islam Antarabangsa Malaysia
Language: English
English

Internet

http://irep.iium.edu.my/110063/13/110063_Efficient%20Dual%20Mode%20Arbitration%20Scheme%20for%20Multiprocessor%20Hardware.pdf
http://irep.iium.edu.my/110063/7/110063_Efficient%20Dual%20Mode%20Arbitration%20Scheme%20for%20Multiprocessor%20Hardware%20Interface%20in%20System-on-Chip_Scopus.pdf
http://irep.iium.edu.my/110063/
http://section.iaesonline.com/index.php/IJEEI/article/view/5032

Similar Items