Encoders design for 4-bit flash ADC using 0.18nm CMOS technology / Faridah Fasyah Yendiri Abdullah
This paper describes design and performance of encoder for 4-bit flash analog to digital converter (ADC). Encoder for flash ADC is known for its high speed operation. In this paper, three of encoder designs are use to do the comparisons between power and propagations delay, it is implemented in 0.18...
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| Main Author: | |
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| Format: | Thesis |
| Language: | English |
| Published: |
2014
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| Subjects: | |
| Online Access: | https://ir.uitm.edu.my/id/eprint/103042/1/103042.pdf https://ir.uitm.edu.my/id/eprint/103042/ |
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| Institution: | Universiti Teknologi Mara |
| Language: | English |
| Summary: | This paper describes design and performance of encoder for 4-bit flash analog to digital converter (ADC). Encoder for flash ADC is known for its high speed operation. In this paper, three of encoder designs are use to do the comparisons between power and propagations delay, it is implemented in 0.18 urn CMOS technology. Generally, the silvaco electronic design automation (EDA) Tools that used for drawing the schematics and do the simulations of the 4-bit encoder. The digital encoder can operate more efficient in terms of power dissipation only 6.48mW at 1.8V supply voltage. Meanwhile the lowest propagation delay time goes to 2-stage pipelining encoder with the result value 0.9385ns fastest. In addition the preferred design of encoder is determine according to simulation among 3 design values of speed and its overall performance in encoder. |
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