A 2.2 to 2.9 GHz Complementary Class-C VCO With PMOS Tail-Current Source Feedback Achieving – 120 dBc/Hz Phase Noise at 1 MHz Offset
The performance of low-powered transceivers is required to meet stringent specifications for an advanced wireless radio application. It is critical for a voltage-controlled oscillator (VCO) to meet multi-standard and multiple frequency operation with low-power consumption and amplitude enhanced comp...
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my.um.eprints.234682020-01-20T00:54:48Z http://eprints.um.edu.my/23468/ A 2.2 to 2.9 GHz Complementary Class-C VCO With PMOS Tail-Current Source Feedback Achieving – 120 dBc/Hz Phase Noise at 1 MHz Offset Shasidharan, Pravinah Ramiah, Harikrishnan Rajendran, Jagadheswaran TK Electrical engineering. Electronics Nuclear engineering The performance of low-powered transceivers is required to meet stringent specifications for an advanced wireless radio application. It is critical for a voltage-controlled oscillator (VCO) to meet multi-standard and multiple frequency operation with low-power consumption and amplitude enhanced complementary mode of operation. This paper proposes a novel technique for wide tuning range in a complementary class-C VCO employing a capacitive-source degeneration (CSD) to meet multi-standard operation for low-power transceivers. The technique that employs two sets of symmetrical split PMOS biased current source operating in the subthreshold region achieves the desired low phase noise (PN) performance at a tuning range of 2.2-2.9 GHz with a supply headroom of 1.2 V. The control of the dc bias point reduces the conduction angle, which improves the current efficiency, power consumption, and PN. Concurrently, an auxiliary $-g_{m}$ NMOS only class-B oscillator is incorporated to mitigate the start-up issue of the class-C VCO. At the center frequency of 2.45 GHz, the proposed VCO achieves a power consumption of 1.73 mW, phase noise of-120 dBc/Hz at the 1-MHz offset, and a figure-of-merit (FoM) of 185.41 dBc/Hz at 1 MHz. The total active chip area is only 0.3-mm2 excluding bond pads. The proposed VCO serves as a promising solution for low-power wireless communication systems. © 2013 IEEE. Institute of Electrical and Electronics Engineers 2019 Article PeerReviewed Shasidharan, Pravinah and Ramiah, Harikrishnan and Rajendran, Jagadheswaran (2019) A 2.2 to 2.9 GHz Complementary Class-C VCO With PMOS Tail-Current Source Feedback Achieving – 120 dBc/Hz Phase Noise at 1 MHz Offset. IEEE Access, 7. pp. 91325-91336. ISSN 2169-3536 https://doi.org/10.1109/ACCESS.2019.2927031 doi:10.1109/ACCESS.2019.2927031 |
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TK Electrical engineering. Electronics Nuclear engineering Shasidharan, Pravinah Ramiah, Harikrishnan Rajendran, Jagadheswaran A 2.2 to 2.9 GHz Complementary Class-C VCO With PMOS Tail-Current Source Feedback Achieving – 120 dBc/Hz Phase Noise at 1 MHz Offset |
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The performance of low-powered transceivers is required to meet stringent specifications for an advanced wireless radio application. It is critical for a voltage-controlled oscillator (VCO) to meet multi-standard and multiple frequency operation with low-power consumption and amplitude enhanced complementary mode of operation. This paper proposes a novel technique for wide tuning range in a complementary class-C VCO employing a capacitive-source degeneration (CSD) to meet multi-standard operation for low-power transceivers. The technique that employs two sets of symmetrical split PMOS biased current source operating in the subthreshold region achieves the desired low phase noise (PN) performance at a tuning range of 2.2-2.9 GHz with a supply headroom of 1.2 V. The control of the dc bias point reduces the conduction angle, which improves the current efficiency, power consumption, and PN. Concurrently, an auxiliary $-g_{m}$ NMOS only class-B oscillator is incorporated to mitigate the start-up issue of the class-C VCO. At the center frequency of 2.45 GHz, the proposed VCO achieves a power consumption of 1.73 mW, phase noise of-120 dBc/Hz at the 1-MHz offset, and a figure-of-merit (FoM) of 185.41 dBc/Hz at 1 MHz. The total active chip area is only 0.3-mm2 excluding bond pads. The proposed VCO serves as a promising solution for low-power wireless communication systems. © 2013 IEEE. |
format |
Article |
author |
Shasidharan, Pravinah Ramiah, Harikrishnan Rajendran, Jagadheswaran |
author_facet |
Shasidharan, Pravinah Ramiah, Harikrishnan Rajendran, Jagadheswaran |
author_sort |
Shasidharan, Pravinah |
title |
A 2.2 to 2.9 GHz Complementary Class-C VCO With PMOS Tail-Current Source Feedback Achieving – 120 dBc/Hz Phase Noise at 1 MHz Offset |
title_short |
A 2.2 to 2.9 GHz Complementary Class-C VCO With PMOS Tail-Current Source Feedback Achieving – 120 dBc/Hz Phase Noise at 1 MHz Offset |
title_full |
A 2.2 to 2.9 GHz Complementary Class-C VCO With PMOS Tail-Current Source Feedback Achieving – 120 dBc/Hz Phase Noise at 1 MHz Offset |
title_fullStr |
A 2.2 to 2.9 GHz Complementary Class-C VCO With PMOS Tail-Current Source Feedback Achieving – 120 dBc/Hz Phase Noise at 1 MHz Offset |
title_full_unstemmed |
A 2.2 to 2.9 GHz Complementary Class-C VCO With PMOS Tail-Current Source Feedback Achieving – 120 dBc/Hz Phase Noise at 1 MHz Offset |
title_sort |
2.2 to 2.9 ghz complementary class-c vco with pmos tail-current source feedback achieving – 120 dbc/hz phase noise at 1 mhz offset |
publisher |
Institute of Electrical and Electronics Engineers |
publishDate |
2019 |
url |
http://eprints.um.edu.my/23468/ https://doi.org/10.1109/ACCESS.2019.2927031 |
_version_ |
1657488213788327936 |